[Cialug] PCI latency settings
Todd Walton
tdwalton at gmail.com
Wed Jan 17 15:49:35 CST 2007
On 1/17/07, Nathan C. Smith <smith at ipmvs.com> wrote:
> To give the telcom cards a longer time to get their data on the bus is my
> (meager) understanding.
Ah, I see now. From the link you gave:
"The PCI latency timer
"The answer to this question has everything to do with a configurable
setting that each PCI device has, the PCI bus latency timer. It's
normally the role of the Linux driver to set the proper PCI bus
latency timer value for each PCI device in your system, and most of
the time the default settings are adequate (if not optimal), all the
devices get along fine and the system works properly. The PCI bus
latency timer can range from zero to 248. If a device has a setting of
zero, then it will immediately give up the bus if another device needs
to transmit. If a device has a setting of 248, it will continue to use
the bus for a longer period of time before stopping, while the other
device waits for its turn.
"If all of your devices have relatively high PCI bus latency timer
settings and a lot of data is being sent over the bus, then your PCI
cards are generally going to have to wait longer before they gain
control of the bus and can begin sending data. However, once they gain
control of the bus they will be able to burst a lot of data across it
before giving up the bus to another device. This is why high PCI bus
latency timer settings increase latency (the delay in sending data
across the bus), but also increase effective bandwidth. Because each
device gets to burst large amounts of data across the bus without
interruption, the PCI bus is used more efficiently and your PCI
devices can transmit more data.
"On the other hand, if all your PCI devices have low PCI bus latency
settings, then they're going to gladly give up the bus if another card
needs to transmit data. This results in a much lower data transmit
latency, since no device is going to hold on to the bus for an
extended period of time, causing other devices to wait. The dark side
to all this is that low PCI bus latency timer settings reduce the
effective PCI bus bandwidth when two or more PCI devices are operating
simultaneously. This happens because large data bursts become much
less frequent and control of the bus changes rapidly, increasing
overhead."
So, increasing the latency on the comm cards (network?) will allow
them to transmit more data before they get around to releasing control
of the PCI bus.
-todd
More information about the Cialug
mailing list